Technical Field
The present invention relates to a package on package configuration, especially relates to a package substrate having a plurality of copper pillars configured on high density side and fabricated according to integrated circuit (IC) design rule.
Description of Related Art
FIG. 1 shows a prior art U.S. Pat. No. 9,153,560
FIG. 1 shows a prior art which discloses a package on package (PoP) integrated device. The integrated device 1100 includes a first package 1102 and a second package 1104. The first package 1102 includes a first substrate 1106, a first die (e.g., chip) 1108, an encapsulation material 1112, a first set of solder balls 1116, a first set of interconnects 1118, and a first set of package interconnects 1125 (e.g., copper pillar). The second package 1104 includes a second substrate 1105, a second die 1107 a third die 1109, a fourth die 1137, a fifth die 1139, a sixth die 1157, a seventh die 1159, a eighth die 1167, a ninth die 1169, a second set of solder balls 1115, a second set of interconnect 1117, a third set of interconnects 1119, a fourth set of interconnects 1147, and a fifth set of interconnects 1149. The second package 1104 is positioned above the first package 1102.
The prior art described a redistribution circuitry fabricated according a single rule within the substrate 1105, 1106 which cannot be applied to the instant invention comprising a package substrate with at least two redistribution circuitry fabricated according to different design rules.